Huawei's Top Chip Scientist Warns Moore’s Law Is Nearing Its Physical Limit

The End of Moore’s Law?

For decades the semiconductor industry has followed the tidy mathematics of Gordon Moore’s observation: the number of transistors on a chip roughly doubles every eighteen months, and the performance of processors has risen in tandem. That tidy law, however, rests on a simple assumption: that we can keep shrinking the physical size of each transistor indefinitely. Huawei’s leading chip scientist, Liao Heng, says that assumption is slipping away.

In a candid interview with a leading tech outlet, Liao noted that the “physical limits” of silicon‑based transistors are already being hit. He explained that as transistors approach the size of a few nanometers, quantum tunnelling and heat dissipation become crippling problems. “Moore’s Law is a useful metaphor, but it’s becoming a constraint rather than a guide,” he said. "When the world starts to see the edges of silicon, the industry can no longer rely on the same shrinking strategy.”

"The chip industry has become a race to shrink transistors, but that approach is hitting its limits," Liao remarked.

Tau Scaling: A New Paradigm

In the same conversation, Liao outlined a concept he calls the “Tau scaling law,” denoted by the Greek letter τ, which shifts the focus from transistor size to the speed of signal travel within the chip. The idea is simple: if a processor can move data across its internal landscape more quickly, overall performance can rise even without adding more transistors.

Tau scaling proposes several concrete strategies. First, it encourages the redesign of interconnects—the microscopic copper and silicon wires that link logic blocks—to reduce electrical resistance and capacitance. Second, it pushes for three‑dimensional integration, stacking layers of memory and logic to shorten the physical distances signals must travel. Third, it explores novel materials like graphene or transition‑metal dichalcogenides to replace conventional copper interconnects.

Liao cautions that implementing Tau scaling will not be a silver bullet. It will require a concerted effort across the supply chain: designers will need new design‑for‑performance tools; foundries must develop new packaging techniques; and end‑of‑life testing will become more complex. Nevertheless, the shift in mindset could help extend the life of silicon‑based processors for another decade or more.

Implications for the Global Chip Landscape

Liao’s warnings carry particular weight for Western firms that dominate the high‑end semiconductor space. NVIDIA, for instance, has built its recent GPU architecture on the premise of ever‑smaller transistors, achieving performance breakthroughs through sheer density. If Liao’s assessment proves accurate, NVIDIA and its peers may soon reach a plateau where further transistor shrinkage yields diminishing returns.

Moreover, the U.S. export‑control regime that has tightened on Huawei’s access to advanced lithography tools adds an additional layer of complexity. Huawei’s own research labs, however, have reportedly accelerated development of alternative manufacturing techniques, including extreme‑ultraviolet lithography and even research into 2‑D semiconductors.

While it is uncertain how quickly Tau scaling can be commercialised, the broader industry is already testing its principles. Several U.S. chipmakers have announced 3‑D packaging trials, and research groups worldwide are exploring high‑speed interconnects using silicon‑on‑insulator technology. Whether these efforts can rival the performance gains of transistor densification remains to be seen.

The War‑Hero Mindset

Beyond technical detail, Liao’s interview revealed a striking personal philosophy. He described himself as a “war‑hero” in the sense that he views chip development as a battlefield, where strategy and timing can win more than raw power. He criticized what he called the “blind arrogance” of some Western engineers, who he says have become too comfortable in the assumption that shrinking will always work. Instead, he advocates for a diversified approach, blending design optimisation, new materials, and systemic architecture changes.

His remarks resonate with a broader conversation within the global tech community: is the industry ready to move beyond the comfortable narrative of Moore’s Law? If so, how will that shift reshape supply chains, research priorities, and geopolitical dynamics?

Looking Ahead

Whether Liao’s predictions materialise will depend on both the physics of silicon and the willingness of the industry to invest in the Tau‑centric paradigm. If the transition proceeds, the next wave of processors could see performance gains that come not from packing more logic, but from making the logic move faster. For consumers, this could mean smarter devices that stay efficient even as chip densities plateau.

In the meantime, analysts and engineers will keep a close eye on Huawei’s progress, as well as the responses of Western giants. The coming years may well redefine the rules of the chip game—potentially turning the old adage of “more is better” on its head.